Well after looking at the source code to the 8052 core, I found there is no way to currently do what I need to do when dealing with "paged mode" addressing. I need Port 2 (P2) to be the high byte of the address when reading external ram, and it appears the 8052 driver has a place for a callback function but was commented out and doesn't appear to work anyways.
I had to hack the 8052 driver to include P2 as the upper byte when accessing external RAM. I will have to revisit the cpu driver later and include a way to make the callback work. For now I just hard-coded what I need. I'm desperate to see some output soon!